CryoAI v1 - Cryogenic ML Accelerator
Published:
CryoAI v1 - Cryogenic ML Accelerator
| Field | Value |
|---|---|
| Project | CryoAI v1 - Cryogenic ML Accelerator |
| Year | 2021 |
| Technology | GF 22nm FD-SOI |
| Type | ASIC |
| Status | Completed |
| Funding | Fermilab, Northwestern University, Columbia University |
Project Overview
On-edge ML accelerator optimized for cryogenic (4K) operation in GF 22nm. Features custom 22nm memory compilation, e-MRAM integration, and RISC-V processor.
Design Flow
- RTL Design: Verilog HDL implementation and verification
- Synthesis: Cadence Genus with technology-specific optimization
- Place & Route: Cadence Innovus with timing and power closure
- Physical Verification: DRC/LVS with Calibre and extraction
- Verification: Post-layout simulation and formal verification
GitHub repository: [Add link when available]
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